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MIPS TECHNOLOGIES INC Patents: Applications Pending

MIPS TECHNOLOGIES INC Patent Applications Pending

41 applications still open at the USPTO, newest filing first, as the USPTO Open Data Portal records them; the company is the first-named applicant. The application number opens the full record at Patent Center.

  • 2012-12-12: Application PCTUS2012069183; Invention VECTOR SIZE AGNOSTIC SINGLE INSTRUCTION MULTIPLE DATA (SIMD) PROCESSOR ARCHITECTURE; Applicant MIPS TECHNOLOGIES, INC.; Status RO PROCESSING COMPLETED-PLACED IN STORAGE.
  • 2012-11-16: Application PCTUS2012065485; Invention PROCESSOR WITH KERNEL MODE ACCESS TO USER SPACE VIRTUAL ADDRESSES; Applicant MIPS TECHNOLOGIES, INC.; Status RO PROCESSING COMPLETED-PLACED IN STORAGE.
  • 2012-06-22: Application PCTUS2012043713; Invention APPARATUS AND METHOD FOR ACCELERATED HARDWARE PAGE TABLE WALK; Applicant MIPS TECHNOLOGIES, INC.; Status RO PROCESSING COMPLETED-PLACED IN STORAGE.
  • 2012-06-15: Application PCTUS2012042611; Invention PROGRAMMABLE MEMORY ADDRESS SEGMENTS; Applicant MIPS TECHNOLOGIES, INC.; Status RO PROCESSING COMPLETED-PLACED IN STORAGE.
FiledApplicationInventionApplicantStatusPublished asInventor nameInventor countryExaminer
2012-12-12PCTUS2012069183VECTOR SIZE AGNOSTIC SINGLE INSTRUCTION MULTIPLE DATA (SIMD) PROCESSOR ARCHITECTUREMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ILIE GARBACEA
United States
YOUNG, LEE W
2012-11-16PCTUS2012065485PROCESSOR WITH KERNEL MODE ACCESS TO USER SPACE VIRTUAL ADDRESSESMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
SANJAY PATEL
RANGANATHAN SUDHAKAR
CHRIS DEARMAN
United States
United States
United States
YOUNG, LEE W
2012-06-22PCTUS2012043713APPARATUS AND METHOD FOR ACCELERATED HARDWARE PAGE TABLE WALKMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
SANJAY PATEL
RANJIT JOSEPH ROZARIO
United States
United States
YOUNG, LEE W
2012-06-15PCTUS2012042611PROGRAMMABLE MEMORY ADDRESS SEGMENTSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DAVID YIU-MAN LAU
United States
THOMAS, SHANE M
2012-06-15PCTUS2012042608APPARATUS AND METHOD FOR HARDWARE INITIATION OF EMULATED INSTRUCTIONSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DAVID YIU-MAN LAU
United States
THOMAS, SHANE M
2010-01-21PCTUS2010021620SYSTEM AND METHOD FOR IMPROVING MEMORY TRANSFERMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
GEORGI Z. BELOEV
KARAGADA R. KISHORE
KEVIN D. KISSELL
United States
United States
United States
2009-05-08PCTUS2009002893MICROPROCESSOR WITH COMPACT INSTRUCTION SET ARCHITECTUREMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ERIK K. NORDEN
United States
YOUNG, LEE W
2009-03-30PCTUS2009038745APPARATUS AND METHOD FOR CONDENSING TRACE INFORMATION IN A MULTI-PROCESSOR SYSTEMMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
THOMAS BERG
RADHIKA THEKKATH
JAIDEV PATWARDHAN
RYAN KINTER
United States
United States
United States
United States
YOUNG, LEE W
2009-03-25PCTUS2009038261MECHANISM FOR MAINTAINING CONSISTENCY OF DATA WRITTEN BY IO DEVICESMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
WILLIAM LEE
THOMAS BENJAMIN BERG
United States
United States
YOUNG, LEE W
2009-03-16PCTUS2009037247APPARATUS AND METHOD FOR LOW OVERHEAD CORRELATION OF MULTI-PROCESSOR TRACE INFORMATIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
THOMAS BERG
RADHIKA THEKKATH
JAIDEV PATWARDHAN
RYAN KINTER
United States
United States
United States
United States
YOUNG, LEE W
2009-03-10PCTUS2009036698EFFICIENT, SCALABLE AND HIGH PERFORMANCE MECHANISM FOR HANDLING IO REQUESTSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
THOMAS BENJAMIN BERG
WILLIAM LEE
United States
United States
YOUNG, LEE W
2008-09-19PCTUS2008077084SUPPORT FOR MULTIPLE COHERENCE DOMAINSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
RYAN C. KINTER
United States
YOUNG, LEE W
2008-08-29PCTUS2008010234LOW-OVERHEAD/POWER-SAVING PROCESSOR SYNCHRONIZATION MECHANISM, AND APPLICATIONS THEREOFMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
NIGEL JOHN STEPHENS
United Kingdom
YOUNG, LEE W
2008-06-20PCTUS2008067719AVOIDING LIVELOCK USING INTERVENTION MESSAGES IN MULTIPLE CORE PROCESSORSMIPS TECHNOLOGIES, INC.PCT - IPER (International Preliminary Examination Report) 409-416 Mailed
ERA K. NANGIA
RYAN C. KINTER
United States
United States
ROBINSON, ANDRE
2008-06-20PCTUS2008067705REDUCED HANDLING OF WRITEBACK DATAMIPS TECHNOLOGIES, INCPCT - IPER (International Preliminary Examination Report) 409-416 Mailed
RYAN KINTER
United States
ROBINSON, ANDRE
2008-06-20PCTUS2008067676PREVENTING WRITEBACK REACE IN MULTIPLE CORE PROCESSORSMIPS TECHNOLOGIES, INC.PCT - IPER (International Preliminary Examination Report) 409-416 Mailed
ADAM STOLER
SANJAY VISHIN
United States
United States
BRIDGERS, JOYCE ANN
2007-12-20PCTUS2007088351EFFICIENT RESOURCE ARBITRATIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ROJIT JACOB
United States
YOUNG, LEE W
2007-12-14PCTUS2007087632SPECULATIVE CACHE TAG EVALUATIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ROJIT JACOB
United States
YOUNG, LEE W
2007-09-28PCTUS2007021007DATA CACHE VIRTUAL HINT WAY PREDICTION, AND APPLICATIONS THEREOFMIPS TECHNOLOGIES. INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ERA K. NANGIA
VIDYA RAJAGOPALAN
MICHAEL NI
MENG-BING YU
United States
United States
United States
United States
TSAI, SHENG JEN
2007-09-28PCTUS2007021006LOAD/STORE UNIT FOR A PROCESSOR, AND APPLICATIONS THEREOFMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
ERA K. NANGIA
MENG-BING YU
MICHAIL NI
United States
United States
United States
FAHERTY, COREY S
2007-09-28PCTUS2007021005TWICE ISSUED CONDITIONAL MOVE INSTRUCTION, AND APPLICATIONS THEREOFMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
XING YU JIANG
VIDYA RAJAGOPALAN
MARIA UKANWA
KARAGADA RAMARAO KISHORE
United States
United States
United States
United States
VICARY, KEITH E
2007-09-17PCTUS2007078617APPARATUS AND METHOD FOR TRACING INSTRUCTIONS WITH SIMPLIFIED INSTRUCTION STATE DESCRIPTORSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
RADHIKA THEKKATH
ERNEST L. EDGAR
United States
United States
FAHERTY, COREY S
2007-08-15PCTUS2007017896PROCESSOR HAVING A MICRO TAG ARRAY THAT REDUCES DATA CACHE ACCESS POWER, AND APPLICATIONS THEREOFMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
MATTHIAS KNOTH
RYAN C. KINTER
United States
United States
KIM, HONG CHONG
2007-02-12PCTUS2007003752DISTRIBUTIVE SCOREBOARD SCHEDULING IN AN OUT-OF-ORDER PROCESSERMIPS TECHNOLOGIES, INC.PCT - Dispatch to TC Chapter I case
XING YU JIANG
United States
2007-01-22PCTUS2007001702PROCESSOR HAVING A DATA MOVER ENGINE THAT ASSOCIATES REGISTER ADDRESSES WITH MEMORY ADDRESSESMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KARAGADA RAMARAO KISHORE
KEVIN D. KISSELL
GEORGI ZLATKOV BELOEV
VIDYA RAJAGOPALAN
RADHIKA THEKKATH
United States
France
United States
United States
United States
2006-11-15PCTUS2006044355MICROPROCESSOR HAVING A POWER-SAVING INSTRUCTION CACHE WAY PREDICTOR AND INSTRUCTION REPLACEMENT SCHEMEMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
MATTHIAS KNOTH
United States
2006-11-15PCTUS2006044354PROCESSOR UTILIZING A LOOP BUFFER TO REDUCE POWER CONSUMPTIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
MATTHIAS KNOTH
United States
2006-10-26PCTUS2006041614PROCESSOR CORE AND METHOD FOR MANAGING BRANCH MISPREDICTION IN AN OUT-OF-ORDER PROCESSOR PIPELINEMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KARAGADA RAMARAO KISHORE
MARIA UKANWA
VIDYA RAJAGOPALAN
KJELD SVENDSEN
United States
United States
United States
United States
2006-03-28PCTUS2006011327APPARATUS AND METHOD FOR AUTOMATIC LOW POWER MODE INVOCATION IN A MULTI-THREADED PROCESSORMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN, M. JONES
United States
TRAN, VINCENT HUY
2006-03-28PCTUS2006011326APPARATUS AND METHOD FOR SOFTWARE SPECIFIED POWER MANAGEMENT PERFORMANCE USING LOW POWER VIRTUAL THREADSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN, M. JONES
United States
CONNOLLY, MARK A
2006-01-18PCTUS2006001559PROCESSOR INCLUDING THREAD SCHEDULER BASED ON INSTRUCTION STALL LIKELIHOOD PREDICTIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN M. JONES
SANJAY VISHIN
MICHAEL G. JENSEN
RYAN C. KINTER
United States
United States
United States
United States
2006-01-18PCTUS2006001558MICROPROCESSOR WITH THREAD SCHEDULER FOR INCREASING PIPELINE UTILIZATION EFFICIENCYMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN M. JONES
SANJAY VISHIN
MICHAEL G. JENSEN
RYAN C. KINTER
United States
United States
United States
United States
2006-01-18PCTUS2006001557BIFURCATED THREAD SCHEDULER IN A MULTITHREADING MICROPROCESSORMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN M. JONES
THOMAS A. PETERSEN
KEVIN D. KISSELL
RYAN C. KINTER
United States
United States
France
United States
2005-08-11PCTUS2005028774MICROPROCESSOR INSTRUCTIONS FOR EFFICIENT BIT STREAM EXTRACTIONSMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN M. JONES
RYAN C. KINTER
RIVKA SHENHAV
RADHIKA THEKKATH
United States
United States
United States
United States
2005-08-11PCTUS2005028773MICROPROCESSOR INSTRUCTION TO ENABLE ACCESS OF A VIRTUAL BUFFER IN CIRCULAR FASHIONMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
DARREN M. JONES
CHINH NGUYEN TRAN
RADHIKA THEKKATH
RYAN C. KINTER
United States
United States
United States
United States
2004-08-27PCTUS2004028108SUSPENSION AND DEALLOCATION OF COMPUTATIONAL THREADS OF EXECUTION IN A PROCESSORMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KEVIN KISSELL
France
2004-08-27PCTUS2004027976MECHANISMS FOR DYNAMIC CONFIGURATION OF VIRTUAL PROCESSOR RESOURCESMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KEVIN KISSELL
France
2004-08-27PCTUS2004027827INSTRUCTION FOR INITIATION OF CONCURRENT INSTRUCTION STREAMS IN A MULTITHREADING MICROPROCESSORMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KEVIN KISSELL
France
2004-08-26PCTUS2004029272SUSPENSION AND DEALLOCATION OF COMPUTATIONAL THREADS OF EXECUTION IN A PROCESSORMIPS TECHNOLOGIES, INC.RO PROCESSING COMPLETED-PLACED IN STORAGE
KEVIN KISSELL
France
2003-09-22PCTUS2003029559HIGH - FREQUENCY SCAN TESTABILITY WITH LOW - SPEED T ESTERSMIPS TECHNOLOGIES , INC .PCT - IPER (International Preliminary Examination Report) 409-416 Mailed
KENT RICHARD TOWNLEY
United States
PERT, EVAN T
2003-04-17PCTUS2003012200METHOD AND APPARATUS FOR BINDING SHADOW REGISTERS TO VECTORED INTERRUPTSMIPS TECHNOLOGIES, INC.PCT - IPER (International Preliminary Examination Report) 409-416 Mailed
ANDERS JAGD
GIDEON INTRATER
RYAN KINTER
United States
United States
United States
TRAN, DENISE